| Case 1 |
DTC Strategy |
|
- Faulty HECU
|
| Enable Conditions |
- When the MCU can't erase or write a data of the EEPROM
- If the master/slave processor detects abnormal operation in RAM, ROM, interrupt, timer, A/D converter and cycle time
- A failure is detected if the communication error between internal components is detected
- A failure is detected if the internal components are not initialized properly
|
| Fail Safe |
- The ABS/EBD/ESP (ESC)/DBC/AVH/EPB functions are inhibited
- The ABS/EBD/ESP (ESC)/DBC/AVH/EPB warning lamps are activated
|
| Case 2 |
DTC Strategy |
|
| Enable Conditions |
- While system operating stage, the main current sensor and sub current sensor difference is higher than 5A for 0.2 second
- While system not operating stage, main current sensor data is out of 1A
- While system not operating stage, and sub FET enable condition, the volage is less than 2V for 0.2 second
|
| Fail Safe |
- Inhibit the AVH/EPB control and AVH/EBD warning lamps are activated
|