High Speed GMLAN Circuit Description

A High Speed GMLAN Bus is used where data needs to be exchanged at a high enough rate to minimize the delay between the occurrence of a change in sensor value and the reception of this information by a control device using the information to adjust vehicle system performance.

The High Speed GMLAN serial data network consists of two twisted wires. One signal circuit is identified as GMLAN-High and the other signal circuit is identified as GMLAN-Low. At each end of the data bus there is a 120 Ω termination resistor between the GMLAN-High and GMLAN-Low circuits.

Data symbols (1's and 0's) are transmitted sequentially at a rate of 500 Kbit/s. The data to be transmitted over the bus is represented by the voltage difference between the GMLAN-High signal voltage and the GMLAN-Low signal voltage.

When the two wire bus is at rest the GMLAN-High and GMLAN-Low signal circuits are not being driven and this represents a logic "1". In this state both signal circuits are at the same voltage of 2.5 V. The differential voltage is approximately 0 V.

When a logic "0" is to be transmitted, the GMLAN-High signal circuit is driven higher to about 3.5 V and the GMLAN-Low circuit is driven lower to about 1.5 V. The differential voltage becomes approximately 2.0 (+/- 0.5) V.